The course discusses Intel’s Many Integrated Core (MIC) architecture. It covers various programming and optimisation techniques for Intel Xeon Phi coprocessors. We will mainly focus on the KNC version of the chip. The hands-on sessions are done on the Intel Xeon Phi based Salomon system at the IT4Innovations National Supercomputing Center.
The afternoon of the second day will be devoted to a plenum session (see below) with invited talks about Intel Xeon Phi experience on Salomon.